Jose L. Ayala profile picture

Jose L. Ayala

GLSVLSI'13: Proceedings of the 2013 ACM International Conference on the Great Lakes Symposium on VLSI, May 2-3, 2013, Paris, France
Communication Architectures for Systems-on-Chip
Integrated Circuit and System Design: Power and Timing Modeling, Optimization, and Simulation
Communication Architectures for Systems-On-Chip
VLSI-SoC: Forward-Looking Trends in IC and Systems Design 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers
VLSI-SoC: Forward-Looking Trends in IC and Systems Design 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011, Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011, Proceedings
Mga awit ni Joey Ayala