Author Description

The papers compiled in this volume cover a wide range of topics within the general area of provably correct design, including proofs of fundamental results, post hoc formal verification of designs and design techniques where correctness is ensured by construction. The papers are unique in that they demonstrate the use of design techniques for designing real chips. The book should, thus, not be missed by students and researchers interested in the deployment of formally-based techniques on real problems within a great diversity of application areas. Application areas treated within the volume range from packet-routers, arbiters, multiprocessors, serial-parallel converters and CPUs - to arithmetic units and counters. A significant group of the papers is concerned with the special requirements of asynchronous and delay-insensitive design.