Author Description

Random number generators are used in many areas of engineering, computer science, most notably in simulations and cryptographic applications. Only a true random number generator is secure because the output bits are non-repeating and non-reproducible. A true random number generator on a field programmable gate array allows the generator on chip reducing the possibility of a breach in security. An oscillator sampling technique is an effective TRNG in a Xilinx FPGA. This research examines how the differences in period of the oscillators, the size of the jitter zone, and sampling on the rising and falling edge of the oscillator rather than just the rising edge affects the TRNG. The proportion of the size of the jitter zone compared to the period difference between the two oscillators limits the performance. As the jitter zone gets larger, the proportion of the jitter zone to the difference in periods of the oscillators must increase for the output to remain random. Sampling on the rising and falling edge instead of only the rising was not effective. The output was random for only a jitter zone of 24 ps with a period difference of 50 ps and 100 ps. This work has been selected by scholars as being culturally important, and is part of the knowledge base of civilization as we know it. This work was reproduced from the original artifact, and remains as true to the original work as possible. Therefore, you will see the original copyright references, library stamps (as most of these works have been housed in our most important libraries around the world), and other notations in the work. This work is in the public domain in the United States of America, and possibly other nations. Within the United States, you may freely copy and distribute this work, as no entity (individual or corporate) has a copyright on the body of the work. As a reproduction of a historical artifact, this work may contain missing or blurred pages, poor pictures, errant marks, etc. S