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Pentium(R) Pro and Pentium(R) II System Architecture, Second Edition, details the internal architecture of these two processors, describing their hardware and software characteristics, the bus protocol they use to communicate with the system, and the overall machine architecture. It also describes the BIOS Update Feature. Written for computer hardware and software engineers, this book offers insight into how the Pentium Pro and Pentium II family of processors translates legacy x86 code into RISC instructions, executes them out-of-order, and then reassembles the result to match the original program flow. In detailing the Pentium Pro and Pentium II processors' internal operations, the book reveals why the processors generate various transaction types and how they monitor bus traffic generated by other entities to ensure cache consistency.This new edition includes comprehensive coverage of the Pentium II processor. It highlights the differences between the Pentium Pro and Pentium II processors, in particular, the Slot 1 connector and the processor cartridge design utilized by the Pentium II and intended for use in future Intel processors. It features the Pentium II's support for the MMX instruction set and registers, and shows how it is optimized for 16-bit code execution. This book also describes the Pentium II's L2 cache and its support for power-conservation modes.Pentium(R) Pro and Pentium(R) II System Architecture, Second Edition, also covers: the relationship of Pentium Pro and Pentium II processors to other processors, PCI bridges, caches, and memory detailed descriptions of the data, code, and L2 caches power-on configuration and processor startup transaction deferral instruction, register set, paging, and interrupt enhancements to the Pentium Pro and Pentium II BIOS Update Feature Machine Check Architecture performance monitoring and the Time Stamp Counter MMX register and instruction set supported by the Pentium II overview of the Intel 450KX, 450GX, and 440F